ISBN: 978-981-11-0008-6 DOI: 10.18178/wcse.2016.06.018
The Design of an Emulation Framework for Variable Run-Time MIMO Detection Systems Based on FPGA Platform
Abstract— This paper presents an emulation framework, including software simulation model and FPGAbased
hardware platform, to investigate the size of buffering memories with the complexity and signal
optimality of variable run-time MIMO detection system. This framework can evaluate the practical BER
performance and system complexity with different sizes of buffering memories. Furthermore, the emulation
platform based on the Xilinx FPGA is designed and implemented to provide more close-to-reality and
insightful information. Experiments results show that this proposed framework can be used as the tool to
facilitate the design decision about the buffering memory and to elucidate the trade-off between complexity
and signal optimality.
Index Terms— MIMO detection, variable, run-time, FPGA.
Tzu-Ting Tseng, Wei-En Liang, Chung-An Shen
Department of Electronic and Computer Engineering, National Taiwan University of Science and Technology, TAIWAN
Cite: Tzu-Ting Tseng, Wei-En Liang, Chung-An Shen, "The Design of an Emulation Framework for Variable Run-Time MIMO Detection Systems Based on FPGA Platform," Proceedings of 2016 6th International Workshop on Computer Science and Engineering, pp. 103-109, Tokyo, 17-19 June, 2016.